1. Field of the Invention
The present invention relates to a semiconductor device having an MOS transistor, and a method for manufacturing such a semiconductor device.
2. Background Art
Concurrent with the recent reduction of the gate-line width in semiconductor devices having MOS transistors, the channel length has also been reduced. This has brought about a problem that the threshold voltage of the transistor is significantly varied due to the narrow-channel effect.
In order to solve such a problem, there has been proposed a semiconductor device having a depression formed on the surface of a semiconductor substrate, and a gate insulating film and a gate electrode formed on the depression (e.g., Japanese Patent Laid-Open No. 7-99310). Thereby, a long channel length can be secured, and the narrow-channel effect caused by the reduction of the gate-line width can be suppressed.
In a conventional method for manufacturing such a semiconductor device, oxygen ions are selectively implanted in the surface of a semiconductor substrate, the oxygen ions are allowed to react by heat treatment to form an oxide film, and the oxide film is removed to form a depression.
In the conventional method, however, since oxygen ions must be implanted to the depth of the depression to be formed, the oxygen ions must be implanted at a high accelerating voltage. This causes a problem that damage also extends in lateral directions when oxygen ions are implanted. This problem is more serious when the depression is deeper than the source and drain.